Chemical Vapor Deposition

Gap Fill

As discussed, electronic devices are created on a wafer in a series of steps that include depositing layers and creating patterned features such as conductive lines. With electronic devices becoming increasingly smaller, gaps are created between these patterned features that can have high aspect ratios (gap height as compared to width).

A layer is typically deposited over these patterned features to provide electrical insulation between them and any subsequent vertical layers. Whether the gaps possess high aspect ratios or are less demanding (e.g., shallow trench isolation), it is often desirable to create this insulating layer as flat as possible. This is known as planarizing. A flat surface makes optical focusing more precise for creating the next patterned layers and enables smaller feature sizes.

Low ĸ

Insulating layers can benefit by having low ĸ values. The dielectric constant measures the ability of a material to store electrical charges. In an insulating layer, low ĸ values allow the signals that are moving through adjacent conductive layers to travel at higher speeds without losses and without crosstalk or confusion of signals between lines. Some of the Dow Corning® CVD precursor low-ĸ materials can produce films with dielectric constant values of less than 2.7.

Copper Diffusion Barrier

Traditional electronic devices have used aluminum metal to create the final interconnections on the integrated circuit. Newer technology uses copper metal for increased conductivity, thus allowing for faster signal speeds. However, copper metal can diffuse into the substrate—>generally during high-temperature processes—and is accelerated by high temperatures and potentials. This can be prevented by depositing a thin, dense barrier layer.

High ĸ

When used as the insulating layer for logic gates or memory capacitors, high capacitive values are desirable in order to store charges. This means that the layer should have high ĸ values (i.e., an enhanced ability to hold charges). For many years, silicon dioxide (ĸ = 3.9) was the dielectric of choice, but it has now worn out its usefulness.

Low-Temperature Depositions

In creating devices, impurity atoms are deliberately deposited in specific areas to create transistors. When subjected to low temperatures during the processing of subsequent layers, these atoms can diffuse, changing the operation of the device. For these reasons, wafers are said to have a temperature budget of exposure and still operate reliably. Therefore, processing of layers is best done at lower temperatures.

Other reasons for processing at low temperatures include:

• To allow for highly reactive precursors to form abrupt junctions between the doped Si wafer surface and the EPI (abrupt junctions aid in preventing latch-up in CMOS devices)
• To allow for compatibility with newer materials
• To reduce leakage